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ver1.0 1 LD1207 12/9 segment output lines 4 to 7 grid output lines LD1207 12/9 segment output lines 4 to 7 grid output lines ver. 1.0 / mar. 2003 this document is a general product descriptio n and is subject to change without notice. ldt inc. does not assume any responsibility for use of circuits described. LD1207 12/9 segment output lines 4 to 7 grid output lines
ver1.0 2 LD1207 12/9 segment output lines 4 to 7 grid output lines LD1207 revision history 2003.03.12 -first version 1.0 date contents version
ver1.0 3 LD1207 12/9 segment output lines 4 to 7 grid output lines description the LD1207 is specifically designed for led and led display derivers. the LD1207 have 12/9 segment output lines, 7 to 4 grid output lines, one display memory, control circuit and 3 line serial data interface. this function are all incorporated into a single chip to build a highly reliable peripheral device for a single chip microcomputer. it is very convenience to control for numeric display. LD1207?s pin assignments and application circuit are optimized for easy pcb layout and cost saving advantages. features cmos technology segment output line selection by command : 12 ~ 9 grid output line selection by command : 7 ~ 4 operation voltage : 5v low power consumption 8-step dimming control by command serial interface for clock, data input, strobe pins 24-pin, sop package application segment led display : vcr, dvd, mwo
ver1.0 4 LD1207 12/9 segment output lines 4 to 7 grid output lines block diagram segment driver / grid driver serial data interface osc display memory control timing generator dimming circuit pin configuration sg1 sg2 sg3 sg4 sg5 sg6 sg7 sg8 sg9 sg10/gr7 sg11/gr6 sg12/gr5 gr4 gr3 gr 2 gr1 vdd gnd din clk stb gnd vdd sg12/gr5 sg11/gr6 sg10/gr7 sg9 sg8 gnd gr1 gr2 gr3 gr4 sg1 sg2 sg3 sg4 sg5 sg6 sg7 osc din clk stb vdd 6 7 8 9 10 11 12 1 2 3 4 5 19 18 17 16 15 14 13 24 23 22 21 20 gnd r osc
ver1.0 5 LD1207 12/9 segment output lines 4 to 7 grid output lines pin description pin name osc din clk stb vdd sg1 to sg9 sg10/gr7 to sg12/gr5 gnd gr4 to gr1 i/o i i i i - o o - o description oscillator input pin. a resistor is connected to this pin and gnd. data input pin. this pin inputs serial data at the rising edge of the shift clock (staring from the lower bit) clock input pin. rising edge trigger. strobe pin for serial interface. the data input after the stb has fallen is processed as a command. when this pin is ?high?, clk is ignored. power supply segment output pins(p-channel, open drain) segment output pin/ grid output pin (cmos output) ground pin grid output pins (n-channel, open drain) pin no. 1 2 3 4 5,18 6~14 15~17 19,24 20~23
ver1.0 6 LD1207 12/9 segment output lines 4 to 7 grid output lines functional description commands a command is the first byte (b0 to b7) inputted to ld 1207 via din pin after stb pin has changed from ?high? to ?low? state. if for some reason the st b pin is set ?high? while data or commands are being transmitted, the serial communication is initialized, and the data/c ommands being transmitted are considered invalid. command 1 : displaymode setting commands LD1207 provides 4 display mode setting as shown in the diagram below: as stated earlier a command is the first one byte(b0 to b7) transmitted to LD1207 via the din pin when stb is ?low?. however, for these commands, bit no.3 to bit no.6(b2 to b5) are ignored, bit no.7 & bit no.8(b6 to b7) are given a value of ?0?. the display mode setting commands determine the number of segments and grids be used (1/4 to 1/7 duty, 12 to 9 segments). when these commands are executed, the display forcibly turned off. a display command ?on? must be executed in order to resume display. if the same mode setting is selected, no command execution is take place, therefore, nothing happens. when power is turned ?on?, the 7-grid, 9-segment mode is selected. msb 0 0 - - - - b1 b0 lsb don?t care display mode settings : 00 : 4 grids, 12 segments 01 : 5 grids, 11 segments 10 : 6 grids, 10 segments 11 : 7 grids, 9 segments
ver1.0 7 LD1207 12/9 segment output lines 4 to 7 grid output lines command 2 : data setting commands the data setting commands executes the data write mode for LD1207. the data setting command, the bits5 and 6 (b4, b5) are ignored, bit7(b6) is given the value of ?1? while bit8(b7) is given the value of ?0?. please refer to the diagram below. when power is turned on, bit 4 to bit 1 (b3 to b0) are given the value of ?0?. msb 0 lsb don?t care data write mode settings : 00 : write data to display mode 1 - - b3 b2 b1 b0 address increment mode settings (display mode): 0 : increment address after data has been written 1 : fixes address mode settings : 0 : normal operation mode 1 : test mode
ver1.0 8 LD1207 12/9 segment output lines 4 to 7 grid output lines command 3 : address setting commands address setting commands are used to set the address of the display memory. the address is considered valid if it has a value of ?00h? to 0 dh?. if the address is set to 0eh or higher, the data is ignored until a valid address is set. when power is turned on, the address is set at ?00h?. please refer to the diagram below. msb 1 lsb don?t care 1 - - b3 b2 b1 b0 address : 00h to 0dh display mode and ram address data transmitted from an external device to LD1207 via the serial interface are stored in the display ram and are assigned addresses. the ram addresses of LD1207 are given below in 8 bit unit. 00h l 02h l 04h l 06h l 08h l 0ah l 0ch l 04h u 06h u 08h u 0ah u 0ch u 00h u 02h u 05h l 07h l 09h l 0bh l 0dh l 01h l 03h l sg1 sg4 sg5 sg8 sg9 sg12 dig1 dig2 dig3 dig4 dig5 dig6 dig7 xxh l xxh u b0 b3 b4 b7 lower 4 bits higher 4 bits
ver1.0 9 LD1207 12/9 segment output lines 4 to 7 grid output lines command 4 : display control commands the display control commands are used to turn on or off a display. it also used to set the pulse width. please refer to the diagram below. when the power is turned on, a 1/16 pulse width is selected and the displayed is turned off. msb 1 lsb 0 - - b3 b2 b1 b0 don?t care dimming quantity settings : 000 : pulse width = 1/16 001 : pulse width = 2/16 010 : pulse width = 4/16 011 : pulse width = 10/16 100 : pulse width = 11/16 101 : pulse width = 12/16 110 : pulse width = 13/16 111 : pulse width = 14/16 display settings : 0 : display off 1 : display on
ver1.0 10 LD1207 12/9 segment output lines 4 to 7 grid output lines display timing waveform sg output dig1 dig2 dig3 dig4 dign dig1 -------- g1 g2 g3 g4 gn ------- tdisplay =500us
ver1.0 11 LD1207 12/9 segment output lines 4 to 7 grid output lines switching characteristic waveform LD1207 switching characteristies waveform is given below. osc stb clk din pw clk (clock pulse width) ? 400ns t setup (data setup time) ? 100ns t clk-stb (clock - strobe time) ? 1 k t tzh (rise time) ? 1 k t tzl <1 k gn sn 10% 90% pw stb (strobe pulse width) ? 1 k thold (data hold time) ? 100ns t thz (fall time) ? 10 k fosc = oscillation frequency t tlz <10 k f osc pw clk pw clk t setup t hold pw stb t clk-stb 90% 10% t tzl t tzh t tlz t thz
ver1.0 12 LD1207 12/9 segment output lines 4 to 7 grid output lines serial commumication format the following diagram shows the LD1207 serial communication format. reception (data/command write) stb din clk 1 23 78 if data continues. b0 b1 b2 b6 b7
ver1.0 13 LD1207 12/9 segment output lines 4 to 7 grid output lines applications display memory is updated by incrementing addresses. please refer to the following diagram. stb din clk command1 command2 command3 data1 data2 command4 --------------------- --------------------- command2 command3 data command3 data stb din clk where : command 1 : display mode setting command 2 : data setting command command 3 : address setting command data 1 to n : transfer display data (14 bytes max.) command 4 : display control command the following diagram shows the waveforms when updating specific addresses. where : command 2 -- data setting command command 3 -- address setting command data -- display data
ver1.0 14 LD1207 12/9 segment output lines 4 to 7 grid output lines recommended software pr ogramming flowchart start set command 1 set command 2 set command 3 clear display ram (see note 5) set command 4 main program set command 1 set command2 set command 3 set command 4 end note : 1. command 1 : display mode setting 2. command 2 : data setting commands 3. command 3 : address setting commands 4. command 4 : display control commands 5. when ic power is applied for the first time, the contents of the display ram are not defined : thus, it is strongly suggested that the contents of the display ram must be cleared during the initial setting. main loop initial setting
ver1.0 15 LD1207 12/9 segment output lines 4 to 7 grid output lines sop 24l (300 mil) thermal performance in still air junction temperature : 100 ? 1200 1000 800 600 400 200 0 -25 0 25 50 75 100 ambient temperature, ta ( ? ) 966 616 ic mounted glass epoxy pcb ic single power dissipation, pd (mw)
ver1.0 16 LD1207 12/9 segment output lines 4 to 7 grid output lines absolute maximum ratings (unless otherwise stated, ta=25 ? , gnd=0v) parameter supply voltage logic input voltage driver output current/pin maximum driver output current/total symbol vdd vi itotal iohsg rating -0.5 to +7.0 -0.5 to vdd+0.5 400 -50 units v v ma ma iolgr +250 ma recommended operating range (unless otherwise stated, ta= -20 to +70 ? , gnd=0v) parameter logic supply voltage dynamic current (see note) high-level input voltage low-level input voltage symbol vdd idddyn vih vil min. 4.5 . 0.8vdd 0 typ. 5 . . . max. 5.5 5 vdd 0.3 vdd unit v ma v v note : test condition : set display control commands = 80h (display turn off state)
ver1.0 17 LD1207 12/9 segment output lines 4 to 7 grid output lines electrical characteristics (unless otherwise stated, v dd =5v, gnd=ov, ta=25 ? , ) symbol test condition iohsg1 v o = v dd -1v sg1 to sg9. sg10/gr7 to sg12/gr5 iohsg2 v o = v dd -2v sg1 to sg9. sg10/gr 7 to sg12/gr5 iolgr v o = 0.3v gr1 to gr4. sg10/gr7 to sg12/gr5 itolsg v o = v dd -1v sg1 to sg9. sg10/gr7 to sg12/gr5 vih - vil - min. typ. max. unit -10 -14 -30 ma -20 -25 -50 ma 100 140 - ma - - ? 5 % 0.8vdd - - v . - 0.3vdd v 350 500 650 khz parameter high-level output current low-level output current segment high-level output current tolerance high-level input voltage low-level input voltage oscillation frequency fosc r = 51koms
ver1.0 18 LD1207 12/9 segment output lines 4 to 7 grid output lines application circuit gnd vdd sg12/gr5 sg11/gr6 sg10/gr7 sg9 sg8 gnd gr1 gr2 gr3 gr4 sg1 sg2 sg3 sg4 sg5 sg6 sg7 osc din clk stb vdd s6 s7 s1 s2 s3 s4 s5 mcu g1 g2 g3 g4 s9 s8 s12 s11 s10 g1 g2 g3 g4 s6 s7 s1 s2 s3 s4 s5 s8 s9 s10 s11 s12 seg1 seg2 seg3 seg4 seg5 seg6 seg7 digit1 digit2 digit3 digit4 seg8 seg9 seg10 seg11 seg12 4-grid x 12-segment (common cahode) note : the capacitor (0.1uf) connected between the gnd and vdd pins must be located as near as possible to the LD1207 chip. a b c d e f g h a b c d e f g h seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 +5v +5v 51k 0.1p f common cathode type led panel com/ digital(grid)
ver1.0 19 LD1207 12/9 segment output lines 4 to 7 grid output lines LD1207-sp (sop 24) package information

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